In the field of iris recognition, the chip functions like the “brain” of a supercomputer. Today, let’s delve into the “dual-core” engine system of the Iris Digital Base from Homsh Technology and explore the powerful capabilities of the self-developed Qianxin Q80 and Kunxin K20 chips.
What Are They?
The “dual-core” engine adopts an innovative “edge + cloud” hybrid architecture design:
• Qianxin Q80: Focuses on edge computing for real-time processing at the terminal.
• Kunxin K20: Handles large-scale parallel computing in the cloud.
These two chips encapsulate Homsh Technology’s ten years of research and innovation breakthroughs, representing the highest level of iris recognition chips currently available in China. The Qianxin Q80 focuses on real-time processing on the edge side, using a 40nm low-power process, and integrates a dedicated ISP engine and hardware acceleration unit. On the other hand, the Kunxin K20 serves as the core for cloud computing, based on an advanced FPGA architecture capable of large-scale parallel computing. This “edge + cloud” dual-core collaborative architecture not only solves the computational bottleneck in iris recognition applications but also significantly enhances the overall system performance and energy efficiency through well-defined tasks.
What Advantages Does This Design Bring?
• ✅ Local Quick Response
• ✅ Large-Scale Parallel Processing
• ✅ Data Privacy Protection
• ✅ Cost-Efficiency Optimization
How Powerful Are They?
Qianxin Q80: The Edge Computing Powerhouse
The Qianxin Q80 is a self-developed edge computing ASIC chip, optimized for iris recognition scenarios. Using a 40nm low-power process, this chip integrates core functions such as iris image processing, feature extraction, and template comparison. The built-in ISP engine enhances real-time iris images and quality assessment, ensuring high-quality images in various lighting conditions. The hardware acceleration unit directly implements the iris feature extraction and encoding algorithms at the circuit level, significantly boosting processing speed and reducing power consumption.
The chip supports local storage of 2000 iris templates and features an embedded hardware encryption engine to ensure data security, with a power consumption as low as 100mW, making it ideal for integration into mobile and IoT devices. In practical applications, the Qianxin Q80 can complete the entire iris image collection, processing, and 1:1 identity verification process in sub-second time, supporting both liveness detection and cosmetic contact lens detection to effectively prevent spoofing attacks.
Core Technical Indicators:
• Supports storage of 2000 iris templates
• Recognition speed <1 second
• Power consumption as low as 100mW
• Integrated ISP engine
As a representative of domestic iris recognition chips, the Qianxin Q80 has received the national scientific and technological achievement certificate and passed certification by the Hubei Provincial Electronic Information Product Quality Supervision Bureau. It has been successfully applied in intelligent access control, smart locks, and mobile identity authentication products, providing powerful and efficient computational support on the edge side.
Kunxin K20: The Core of Cloud Computing
The Kunxin K20 is a high-performance iris recognition chip developed by Homsh Technology based on advanced FPGA technology, designed for large-scale parallel matching. With a highly parallelized computing architecture, the chip can support 800,000 1:N searches per second. Deploying three matching cards in an HML1000 server achieves peak processing power of 2.4 million searches per second. The chip’s high-speed cache system and intelligent scheduling engine optimize data flow and computational resource allocation, effectively reducing system latency while maintaining millisecond-level responses in large-scale concurrent scenarios.
Compared to traditional CPU/GPU solutions, the Kunxin K20 optimizes key paths of the iris matching algorithm at the hardware level, significantly improving computational efficiency and energy efficiency. The chip also supports dynamic reconfiguration, allowing for updates to functionality with algorithm upgrades, ensuring long-term competitiveness. Furthermore, the Kunxin K20 includes comprehensive fault-tolerant mechanisms and self-checking features, supporting hot-swapping and automatic load balancing for 24/7 operation reliability.
Core Technical Indicators:
• 800,000 matches per second
• Supports user scales up to 1 million
• Stable 24/7 operation
• Supports multi-card cascading expansion
As the central computing unit for cloud-based iris recognition, the Kunxin K20 has been widely applied in large iris recognition systems, including criminal investigation, smart finance, and smart supervision. It supports identity search services for millions of users. Its outstanding performance provides strong computational support for the large-scale application of iris recognition and lays a solid foundation for Homsh Technology’s accumulation in high-performance computing.
Key Innovations
Qianxin Q80 Innovation Features
The Qianxin Q80 integrates multiple innovative technologies in chip architecture and function design, achieving significant breakthroughs in specialized processing for iris recognition. In ISP processing, the chip includes an adaptive iris enhancement engine using the patented “automatic exposure control method for iris recognition,” enabling optimal iris imaging across a wide range of lighting conditions from 0.01-100,000 lux. Additionally, the built-in noise suppression and contrast enhancement units extract more iris texture details in low-light conditions, significantly improving recognition accuracy.
In algorithm acceleration, the Q80 employs a heterogeneous computing architecture, implementing computationally intensive operations such as Gabor filtering and phase quantization in dedicated hardware circuits, speeding up by 5-8 times compared to software implementations while reducing power consumption by 70%. The chip also adopts an innovative pipeline parallel processing mechanism, enabling parallel processing of image capture, feature extraction, and template comparison, with an end-to-end response time under 500ms.
In security protection, the Q80 integrates a hardware security module based on PUF (Physically Unclonable Function) technology, providing chip-level data encryption protection. Each chip generates a unique hardware fingerprint during manufacturing, preventing cloning and tampering. Furthermore, it supports secure boot and firmware integrity verification, preventing malicious code injection and employing a multi-level protection mechanism to ensure the security of iris template data even if the chip falls into the wrong hands.
These innovative features make the Qianxin Q80 one of the most integrated, high-performing, and secure iris recognition edge computing chips on the market, providing powerful local processing capabilities for terminal devices while ensuring user privacy and system security.
Kunxin K20 Innovation Features
As a cloud-based iris recognition dedicated computing chip, the Kunxin K20 incorporates several cutting-edge innovations to deliver exceptional performance in large-scale parallel computing. In the parallel computing architecture, the K20 adopts an innovative grid-based computation array design, decomposing the iris feature matching task into thousands of independent computational units for simultaneous processing. Each computational unit is optimized for similar algorithms, and with the global resource scheduler, computational resources can be dynamically allocated and adjusted based on task complexity, improving computational efficiency by 15-20 times compared to traditional CPU architectures.
In data processing technology, the K20 chip is designed with a three-level cache architecture and intelligent prefetching mechanism, which pre-loads iris template data based on historical access patterns, effectively reducing memory access latency and significantly boosting data throughput. Additionally, an innovative data compression algorithm compresses template storage by 40% while maintaining matching accuracy, supporting more template concurrent loading. The chip’s pipeline matching engine enables seamless task switching, maximizing system overall performance.
In terms of reliability, the K20 achieves full-chip fault tolerance, including computational redundancy, checksum protection, and self-diagnosis technologies. It monitors the status of each computational unit in real-time, isolating faulty units and reallocating tasks to ensure continuous 24/7 operation stability. The chip also supports hot-swapping technology, allowing for dynamic expansion of computational resources without downtime.
As a reconfigurable computing platform, the K20 also offers a flexible algorithm upgrade path, allowing for algorithm optimization and functional expansion through firmware updates without hardware replacement, effectively extending the system’s lifecycle and reducing overall ownership costs.
Performance Comparison
Compared to traditional implementation methods, the dual-core solution (grey area) significantly outperforms traditional solutions (blue area) in six key dimensions: computational performance, response speed, concurrency, reliability, energy efficiency, and cost-effectiveness. Especially in response speed and concurrency, the dual-core solution’s advantages are more pronounced, thanks to the collaboration between edge and cloud computing. With the Qianxin Q80 handling fast local processing and the Kunxin K20 providing large-scale parallel computing capabilities, the dual-core solution maintains high performance while offering superior reliability and energy efficiency, making it an ideal computational platform for large-scale iris recognition applications.
Key Metrics:
• 200% improvement in recognition speed
• 50% reduction in power consumption
• 30% reduction in cost
• 80% improvement in reliability
Chip Evolution
This chip technology evolution roadmap illustrates the three-generation development of Homsh Technology’s chip products. The first-generation chip, using 45nm technology, was launched in 2018, focusing on basic recognition functions, single algorithm support, and local storage capabilities. The second-generation chip, planned for release in 2026, will adopt a more advanced 12nm process and introduce breakthroughs in dual-core cooperation, algorithm hardware acceleration, and cloud-edge collaboration. The third-generation chip, planned for 2027, will further enhance to a 7nm process, incorporating AI acceleration, multi-modal fusion, and security enhancements. This roadmap clearly demonstrates Homsh Technology’s long-term planning and technological evolution in chip research and development, reflecting the trend from basic functions to advanced intelligence.
Conclusion
Homsh Technology will continue to focus on chip technology development, offering stronger and more efficient iris recognition solutions through independent innovation. From the evolution of 45nm to 7nm technology, from single functionality to AI acceleration upgrades, Homsh Technology’s chip development roadmap not only reflects technical strength but also shows long-term strategic vision. With the upcoming release of the second-generation 12nm chip and the progress of the third-generation 7nm chip, we believe that Homsh Technology’s “dual-core” engine will achieve significant breakthroughs in performance, power consumption, and security, providing solid computational support for large-scale iris recognition applications.
As digital transformation deepens, biometric technology is becoming the key link between the physical world and the digital world. Through continuous chip innovation, Homsh Technology not only promotes the widespread application of iris recognition but also sets a technical benchmark for the entire biometric industry. Let’s look forward to the greater possibilities the “dual-core” engine will bring to digital transformation, creating a safer, more convenient, and smarter digital life!
